Freescale Semiconductor, Inc.
System Integration Module (SIM)
Reset and System Initialization
6.4.1 External Pin Reset
Pulling the asynchronous RST pin low halts all processing. The PIN bit
of the SIM reset status register (SRSR) is set as long as RST is held low
for a minimum of 67 CGMXCLK cycles, assuming that neither the POR
nor the LVI was the source of the reset.
Figure 6-4 shows the relative timing of an external reset recovery.
PULLED LOW EXTERNAL
PULLED HIGH EXTERNAL
RST
CGMOUT
VECT H VECT L
IAB
PC
Figure 6-4. External Reset Recovery Timing
MC68HC908RFRK2
MOTOROLA
AdvanceInformation
System Integration Module (SIM)
85
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