Freescale Semiconductor, Inc.
Memory Map
Input/Output Section
Addr.
$001C
↓
Register Name
Bit 7
6
5
4
3
2
1
Bit 0
Unimplemented
$001E
Unimplemented
Read:
Configuration Register
EXTSLOW LVISTOP LVIRST LVIPWR COPRS SSREC
STOP
0
COPD
0
$001F
$0020
$0021
$0022
(CONFIG) Write:
See page 146.
Reset:
0
0
1
1
0
0
0
0
Read: TOF
Timer Status and Control
See page 211.
TOIE
TSTOP
PS2
PS1
PS0
Register (TSC) Write:
0
0
TRST
0
Reset:
0
1
0
0
0
9
0
Read: Bit 15
14
13
12
11
10
Bit 8
Timer Counter Register
High (TCNTH) Write:
See page 213.
Reset:
0
0
6
0
5
0
4
0
3
0
2
0
1
0
Read: Bit 7
Bit 0
Timer Counter Register
Low (TCNTL) Write:
See page 213.
Reset:
Read:
0
Bit 15
1
0
0
0
0
0
0
9
1
1
1
0
Bit 8
1
Timer Counter Modulo
$0023 Register High (TMODH) Write:
14
13
12
11
10
See page 214.
Reset:
1
1
1
1
1
Read:
Timer Counter Modulo
Register Low (TMODL) Write:
Bit 7
1
6
5
1
4
1
3
2
Bit 0
1
$0024
$0025
See page 214.
Reset:
1
CH0IE
0
1
ELS0B
0
1
ELS0A
0
Read: CH0F
Timer Channel 0 Status
and Control Register Write:
(TSC0) See page 215.
MS0B
0
MS0A
TOV0 CH0MAX
0
0
Reset:
0
0
0
= Unimplemented
R
= Reserved U = Unaffected X = Indeterminate
Figure 2-2. Control, Status, and Data Registers (Sheet 2 of 6)
MC68HC908RFRK2
MOTOROLA
AdvanceInformation
35
Memory Map
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