Freescale Semiconductor, Inc.
Memory Map
Input/Output Section
$FE0E
$FE0F
BREAK STATUS AND CONTROL REGISTER (BSCR)
LVI STATUS REGISTER (LVISR)
$FE10
↓
UNIMPLEMENTED (222 BYTES)
$FEEF
$FEF0
↓
MONITOR ROM (16 BYTES)
$FEFF
$FF00
↓
UNIMPLEMENTED (240 BYTES)
$FFEF
$FFF0
$FFF1
FLASH BLOCK PROTECT REGISTER (FLBPR)
RESERVED (1 BYTE)
$FFF2
↓
$FFFF
FLASH VECTORS
(14 Bytes)
Figure 2-1. Memory Map (Continued)
2.3 Input/Output Section
Addresses $0000–$003F, shown in Figure 2-2, contain most of the
control, status, and data registers. Additional I/O registers have these
addresses:
•
•
•
•
•
•
•
•
•
•
$FE00 — SIM break status register, SBSR
$FE01 — SIM reset status register, SRSR
$FE02 — SIM break flag control register, BFCR
$FE08 — FLASH control register, FLCR
$FE0C — BREAK address register high, BRKH
$FE0D — BREAK address register low, BRKL
$FE0E — BREAK status and control register, BSCR
$FE0F — LVI status register, LVISR
$FFF0 — FLASH block protection register, FLBPR
$FFFF — COP control register, COPCTL
MC68HC908RFRK2
MOTOROLA
AdvanceInformation
33
Memory Map
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