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68HC908RFRK2 参数 Datasheet PDF下载

68HC908RFRK2图片预览
型号: 68HC908RFRK2
PDF下载: 下载PDF文件 查看货源
内容描述: 超前信息 [Advance Information]
分类和应用:
文件页数/大小: 250 页 / 2075 K
品牌: FREESCALE [ Freescale ]
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Freescale Semiconductor, Inc.  
Timer Interface Module (TIM)  
Functional Description  
The value in the TIM counter modulo registers and the selected  
prescaler output determines the frequency of the PWM output. The  
frequency of an 8-bit PWM signal is variable in 256 increments. Writing  
$00FF (255) to the TIM counter modulo registers produces a PWM  
period of 256 times the internal bus clock period if the prescaler select  
value is $000. See 15.9.1 TIM Status and Control Register.  
The value in the TIM channel registers determines the pulse width of the  
PWM output. The pulse width of an 8-bit PWM signal is variable in 256  
increments. Writing $0080 (128) to the TIM channel registers produces  
a duty cycle of 128/256 or 50 percent.  
15.5.7 Unbuffered PWM Signal Generation  
Any output compare channel can generate unbuffered PWM pulses as  
described in 15.5.6 Pulse-Width Modulation (PWM). The pulses are  
unbuffered because changing the pulse width requires writing the new  
pulse width value over the old value currently in the TIM channel  
registers.  
An unsynchronized write to the TIM channel registers to change a pulse  
width value could cause incorrect operation for up to two PWM periods.  
For example, writing a new value before the counter reaches the old  
value but after the counter reaches the new value prevents any compare  
during that PWM period. Also, using a TIM overflow interrupt routine to  
write a new, smaller pulse width value may cause the compare to be  
missed. The TIM may pass the new value before it is written.  
Use these methods to synchronize unbuffered changes in the PWM  
pulse width on channel:  
When changing to a shorter pulse width, enable channel output  
compare interrupts and write the new value in the output compare  
interrupt routine. The output compare interrupt occurs at the end  
of the current pulse. The interrupt routine has until the end of the  
PWM period to write the new value.  
When changing to a longer pulse width, enable channel TIM  
overflow interrupts and write the new value in the TIM overflow  
interrupt routine. The TIM overflow interrupt occurs at the end of  
MC68HC908RFRK2  
MOTOROLA  
AdvanceInformation  
Timer Interface Module (TIM)  
205  
For More Information On This Product,  
Go to: www.freescale.com  
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