GENERAL RELEASE SPECIFICATION
August 27, 1998
The clock source is selected by the VCOEN bit in the IRQ Status and Control Reg-
ister at $0D. Table 8-1 shows a summary of the clock source selection.
BIT 7
IRQE
1
BIT 6
VCOEN
1
BIT 5
LEVEL
0
BIT 4
0
BIT 3
IRQF
BIT 2
0
BIT 1
0
BIT 0
0
ISCR
R
$000D
W
IRQR
0
reset:
0
0
0
0
Figure 8-2. IRQ Status and Control Register (ISCR)
VCOEN — VCO ENable
1 = Internal VCO is used as clock source for the MCU.
This is the default setting after a reset.
0 = External OSC is used as clock source for the MCU. If external OSC
is disabled (mask option or MOR in MC68HC705SB7), the internal
VCO is used as clock source.
After a POR or reset, the internal VCO is selected as the default clock source.
.
Table 8-1. Clock Source Selection
External OSC Enabled
Internal VCO Enabled
Clock Source Selected
Internal
(Mask Option)
Don’t care
(VCOEN=X)
Disabled
(OSCS=0 in MC68HC705SB7)
Disabled
(VCOEN=0)
Enabled
(OSCS=1 in MC68HC705SB7)
External
Enabled
(VCOEN=1)
Enabled
(OSCS=1 in MC68HC705SB7)
Internal
NOTE
The user must ensure that the oscillators are stable (4096 clock cycles minimum)
if switching between internal and external oscillators.
8.2
VCO CLOCK SPEED
8.2.1 VCO Slow Mode
The internal VCO has two operating modes: Normal mode and Slow mode.
In Normal mode, the VCO frequency ranges from 1.5MHz to 5.8MHz.
In Slow mode, the VCO frequency ranges from 500Hz to 4kHz.
This clock speed option is selected by setting the SCLK bit in the Miscellaneous
Register at $0B. The default setting at reset is Normal mode.
MOTOROLA
8-2
SYSTEM CLOCK
MC68HC05SB7
REV 2.1
FREESCALE [ Freescale ]
