GENERAL RELEASE SPECIFICATION
August 27, 1998
7.1.1 Port Data Registers
Each port I/O pin has a corresponding bit in the Port Data Register. When a port I/
O pin is programmed as an output the state of the corresponding data register bit
determines the state of the output pin. All port I/O pins can sink a current of 5mA
when programmed as outputs. When a port pin is programmed as an input, any
read of the Port Data Register will return the logic state of the corresponding I/O
pin.
7.1.2 Port Data Direction Registers
Each port I/O pin may be programmed as an input by clearing the corresponding
bit in the DDR, or programmed as an output by setting the corresponding bit in the
DDR.
NOTE
A “glitch” can be generated on an I/O pin when changing it from an input to an
output unless the data register is first preconditioned to the desired state before
changing the corresponding DDR bit from a “0” to a “1”. Therefore, write data to
the I/O Port Data Register before writing a “1” to the corresponding Data Direction
Register.
7.2
7.3
PORT A
Port A is an 8-bit bidirectional port with pins shared with the PWM outputs and
SM-Bus serial I/Os. The Port A Data Register is at address $0000 and the Data
Direction Register is at address $0004.
PORT B
Port B is a 7-bit birdirectional port with pins shared with A/D converter inputs, cur-
rent detect outputs, and the 16-bit timer TCAP input. The Port B Data Register is
at address $0001 and the Data Direction Register is at address $0005.
When selected by mask option, port pins PB2 and PB3 becomes OSC1 and
OSC2 respectively.
7.4
PORT C
Port C is a 4-bit bidirectional port. The Port C Data Register is at address $0002
and the Data Direction Register is at address $0006.
MOTOROLA
7-2
INPUT/OUTPUT PORTS
MC68HC05SB7
REV 2.1
FREESCALE [ Freescale ]
