August 27, 1998
GENERAL RELEASE SPECIFICATION
SECTION 7
INPUT/OUTPUT PORTS
In normal operating mode there are 19 bidirectional I/O lines arranged as three I/
O ports (Port A, B and C). The individual bits in these ports are programmable as
either inputs or outputs under software control by the data direction registers
(DDRs). All port I/O pins can sink a current of 5mA when programmed as outputs.
7.1
PARALLEL PORTS
Port A, B and C are bidirectional ports. Each port pin is controlled by the corre-
sponding bits in a data direction register and a data register as shown in Figure 7-
1.
Read/Write DDR
Data Direction
Register Bit
Write Data
Data
Register Bit
I/O
PIN
OUTPUT
Read Data
Reset
(RST)
Internal HC05
Data Bus
Figure 7-1. Port I/O Circuitry
Table 7-1. I/O Pin Functions
R/W
DDR
I/O Pin Functions
0
0
1
1
0
1
0
1
The I/O pin is in input mode. Data is written into the output data latch.
Data is written into the output data latch and output to the I/O pin.
The state of the I/O pin is read.
The I/O pin is in an output mode. The output data latch is read.
MC68HC05SB7
REV 2.1
INPUT/OUTPUT PORTS
MOTOROLA
7-1
FREESCALE [ Freescale ]
