Freescale Semiconductor, Inc.
Parallel Input/Output
Port B
7.4.6 PB4/ AN4/ TCMP/ CMP1 Log ic
The PB4/AN4/TCMP/CMP1 pin can be used as a simple I/O port pin, be
controlled by the OLVL bit from the output compare function of the 16-bit
programmable timer, or be controlled directly by the output of
comparator 1 as shown in Figure 7-9. The PB4 data, the programmable
timer OLVL bit, and the output of comparator 1 are all logically ORed
together to drive the pin. Also, the analog subsystem input channel 4
multiplexer is connected directly to this pin. The operations of PB4 pin
are summarized in Table 7-2.
ANALOG SUBSYSTEM
INPUT AN4 AND
TIMER OUTPUT COMPARE
READ $0005
WRITE $0005
DATA DIRECTION
REGISTER B
BIT DDRB4
R
PORT BDATA
REGISTER
BIT PB4
WRITE $0001
PB4
AN4
TCMP
HIGH SINK/
SOURCE CURRENT
CAPABILITY
OLVL
(TIMER OUTPUT COMPARE)
CMP1
(COMPARATOR 1 OUT)
READ $0001
WRITE $0011
PULLDOWN
REGISTER B
BIT PDIB4
PULLDOWN
DEVICE
R
RESET
MASK OPTION REGISTER ($1FF1)
MASK OPTION REGISTER ($1FF0)
Figure 7-9. PB4/AN4/TCMP/CMP1 Pin I/O Circuit
MC68HC705JJ7/MC68HC705JP7 — Rev. 3.0
General Release Specification
Parallel Input/Output
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