Freescale Semiconductor, Inc.
Parallel Input/Output
Port B
Table 7-2. Port B Pin Functions — PB0:4
Control Bits
Timer
PORTB Access
Result on
(Pin or Data
Register)
Port B Pins
Port B
Pin
Comparator 1
Port B
SWPDI
in
OPT in
CMP1 COE1
OLVL MOR
PDIBx DDRBx* Read
Write Pulldown
Pin
MOR
0
0
1
0
0
0
1
0
0
0
1
1
1
1
1
Pin
Pin
Pin
Data
Pin
Pin
Pin
Data
Data
Data
1
Data
Data
Data
Data
Data
Data
Data
Data
Data
Data
Data
Data
On
Off
Off
Off
On
Off
Off
Off
Off
Off
Off
Off
PBx In
PBx In
PBx In
PBx Out
PB4 In
PB4 In
PB4 In
PB4 Out
PB4 Out
PB4 Out
1
PB0
PB1
PB2
PB3
0
X
X
X
X
1
X
X
0
X
0
X
X
X
X
0
1
1
X
X
X
X
X
X
X
X
0
X
0
1
X
1
0
1
1
X
1
0
0
0
1
X
X
X
X
X
X
PB4
X
1
1
1
* DDRB can always be read or written.
X = Don’t Care
MC68HC705JJ7/MC68HC705JP7 — Rev. 3.0
General Release Specification
Parallel Input/Output
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