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68HC705JJ7_1 参数 Datasheet PDF下载

68HC705JJ7_1图片预览
型号: 68HC705JJ7_1
PDF下载: 下载PDF文件 查看货源
内容描述: 常规版本规格 [General Release Specification]
分类和应用:
文件页数/大小: 230 页 / 5548 K
品牌: FREESCALE [ Freescale ]
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Freescale Semiconductor, Inc.  
Op e ra ting Mod e s  
STOP  
HALT  
WAIT  
YES  
SWAIT BIT  
CLEAR I BIT IN CCR.  
SET IRQE BIT IN ISCR.  
TURN OFF CPU CLOCK.  
KEEP OTHER MODULE  
CLOCKS ACTIVE.  
CLEAR I BIT IN CCR.  
SET IRQE BIT IN ISCR.  
TURN OFF CPU CLOCK.  
KEEP OTHER MODULE  
CLOCKS ACTIVE.  
IN MOR SET?  
NO  
CLEAR I BIT IN CCR.  
SET IRQE BIT IN ISCR.  
CLEAR CTOF, RTIF, CTOFE, AND RTIE BITS IN TSCR.  
CLEAR ICF, OCF, AND TOF BITS IN TSR.  
CLEAR ICIE, OCIE, AND TOIE BITS IN TCR.  
DISABLE EXTERNAL PIN OSCILLATOR.  
TURN OFF INTERNAL LOW-POWER OSCILLATOR.  
YES  
YES  
EXTERNAL  
RESET?  
EXTERNAL  
RESET?  
NO  
NO  
YES  
YES  
YES  
YES  
YES  
YES  
YES  
YES  
YES  
YES  
YES  
YES  
YES  
EXTERNAL  
EXTERNAL  
EXTERNAL  
INTERRUPT?  
INTERRUPT?  
RESET?  
NO  
NO  
NO  
CORE  
TIMER  
INTERRUPT?  
CORE  
TIMER  
INTERRUPT?  
YES  
EXTERNAL  
INTERRUPT?  
NO  
NO  
NO  
PROG.  
TIMER  
INTERRUPT?  
PROG.  
TIMER  
INTERRUPT?  
TURN ON SELECTED OSCILLATOR.  
RESET STABILIZATION DELAY TIMER.  
NO  
NO  
SIOP  
INTERRUPT?  
SIOP  
INTERRUPT?  
NO  
NO  
YES  
END OF  
STABILIZATION  
DELAY?  
ANALOG  
INTERRUPT?  
ANALOG  
INTERRUPT?  
NO  
NO  
NO  
COP  
RESET?  
COP  
RESET?  
TURN ON CPU CLOCK.  
NO  
NO  
1. LOAD PC WITH RESET VECTOR  
OR  
2. SERVICE INTERRUPT.  
a. SAVE CPU REGISTERS ON STACK.  
b. SET I BIT IN CCR.  
c. LOAD PC WITH INTERRUPT VECTOR.  
Figure 6-2. Stop/Wait/Halt Flowchart  
General Release Specification  
MC68HC705JJ7/MC68HC705JP7 Rev. 3.0  
Operating Modes  
For More Information On This Product,  
Go to: www.freescale.com  
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