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68HC705JJ7_1 参数 Datasheet PDF下载

68HC705JJ7_1图片预览
型号: 68HC705JJ7_1
PDF下载: 下载PDF文件 查看货源
内容描述: 常规版本规格 [General Release Specification]
分类和应用:
文件页数/大小: 230 页 / 5548 K
品牌: FREESCALE [ Freescale ]
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Freescale Semiconductor, Inc.  
Op e ra ting Mod e s  
6.3 Osc illa tor Sourc e  
The MCU can be clocked by either an internal low-power oscillator  
(LPO) without external components or by an external pin oscillator  
(EPO) which uses external components. The enable and selection of the  
clock source is determined by the state of the oscillator select bits (OM1  
and OM2) in the interrupt status and control register (ISCR) as shown in  
Figure 6-1.  
$000D  
Read:  
Write:  
Reset:  
Bit 7  
IRQE  
1
6
OM2  
1
5
OM1  
0
4
0
3
2
0
1
0
Bit 0  
0
IRQF  
R
0
IRQR  
0
0
0
0
= Unimplemented  
= Reserved  
R
Figure 6-1. IRQ Status and Control Register (ISCR)  
IRQE — External Interrupt Request Enable  
This read/write bit enables external interrupts. Refer to Section 4.  
Interrupts for more details.  
OM1 and OM2 — Oscillator Selects  
These bits control the selection and enabling of the oscillator source  
for the MCU. One choice is the internal LPO and the other oscillator  
is the EPO which is common to most MC68HC05 MCU devices. The  
EPO uses external components like filter capacitors and a crystal or  
ceramic resonator and consumes more power than the LPO. The  
selection and enable conditions for these two oscillators are shown in  
Table 6-1. Reset clears OM1 and sets OM2, which selects the LPO  
and disables the EPO.  
.
Table 6-1. Oscillator Selection  
External  
Internal  
Oscillator  
Selected  
Pin  
Power  
OM2 OM1  
Low-Power  
Oscillator Consumption  
(EPO)  
Oscillator (LPO)  
0
0
1
1
0
1
0
1
Internal  
External  
Internal  
Internal  
Enabled  
Disabled  
Enabled  
Enabled  
Disabled  
Enabled  
Disabled  
Enabled  
Lowest  
Normal  
Lowest  
Normal  
General Release Specification  
MC68HC705JJ7/MC68HC705JP7 Rev. 3.0  
Operating Modes  
For More Information On This Product,  
Go to: www.freescale.com