Freescale Semiconductor, Inc.
Programmable Timer
Introduction
PB3
AN3
TCAP
EDGE
INPUT
SELECT
MUX
SELECT
ICRH ($0014)
TMRH ($0018)
ICRL ($0015)
TMRL ($0019)
& DETECT
LOGIC
CI F
ACRH ($001A)
ACRL ($001B)
CPF2
FLAG
BIT
EI D G
FROM
ANALOG
SUBSYSTEM
INTERNAL
CLOCK
(OSC ÷ 2)
16-BIT COUNTER
÷ 4
ICEN
CONTROL
BIT
16-BIT COMPARATOR
PB4
D Q
C
PIN I/O
LOGIC
AN4
TCMP
OCRH ($0016)
OCRL ($0017)
ANALOG
COMP 1
TIMER
INTERRUPT
REQUEST
RESET
TIMER CONTROL REGISTER
$0012
TIMER STATUS REGISTER
$0013
INTERNAL DATA BUS
Figure 11-1. Programmable Timer Overall Block Diagram
MC68HC705JJ7/MC68HC705JP7 — Rev. 3.0
General Release Specification
Programmable Timer
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