Register Descriptions
6.5 Register Descriptions
Table 6-1 SIM Registers
(SIM_BASE = $00 F350)
Address Offset
Address Acronym
Register Name
Section Location
Base + $0
Base + $1
Base + $2
Base + $3
Base + $4
Base + $5
Base + $6
Base + $7
Base + $8
SIM_CONTROL
SIM_RSTSTS
SIM_SCR0
Control Register
6.5.1
6.5.2
6.5.3
6.5.3
6.5.3
6.5.3
6.5.4
6.5.5
6.5.6
Reset Status Register
Software Control Register 0
Software Control Register 1
Software Control Register 2
Software Control Register 3
Most Significant Half of JTAG ID
Least Significant Half of JTAG ID
Pull-up Disable Register
SIM_SCR1
SIM_SCR2
SIM_SCR3
SIM_MSH_ID
SIM_LSH_ID
SIM_PUDR
Reserved
Base + $A
Base + $B
Base + $C
Base + $D
Base + $E
Base + $F
SIM_CLKOSR
SIM_GPS
CLKO Select Register
6.5.7
6.5.8
GPIO Peripheral Select Register
Peripheral Clock Enable Register
I/O Short Address Location High Register
I/O Short Address Location Low Register
Peripheral Clock Enable Register 2
SIM_PCE
6.5.9
SIM_ISALH
SIM_ISALL
SIM_PCE2
6.5.10
6.5.10
6.5.11
56F8367 Technical Data, Rev. 9
Freescale Semiconductor
Preliminary
113
FREESCALE [ Freescale ]
