External Clock Operation
3.5.3
External Clock Source
The recommended method of connecting an external clock is given in Figure 3-9. The external clock
source is connected to XTAL and the EXTAL pin is grounded.
56F801
XTAL
EXTAL
V
External Clock
SS
Figure 3-9 Connecting an External Clock Signal
3
Table 3-8 External Clock Operation Timing Requirements
Operating Conditions: VSS = VSSA = 0 V, VDD = VDDA = 3.0–3.6 V, TA = –40° to +85°C
Characteristic
Symbol
fosc
Min
0
Typ
—
Max
Unit
MHz
ns
Frequency of operation (external clock driver)1
Clock Pulse Width3, 4
802
—
tPW
6.25
—
1. See Figure 3-9 for details on using the recommended connection of an external clock driver.
2. May not exceed 60MHz for the DSP56F801FA60 device.
3. The high or low pulse width must be no smaller than 6.25ns or the chip will not function. However, the high pulse width
does not have to be any particular percent of the low pulse width.
4. Parameters listed are guaranteed by design.
VIH
External
Clock
90%
50%
10%
90%
50%
10%
VIL
tPW
Note: The midpoint is VIL + (VIH – VIL)/2.
tPW
Figure 3-10 External Clock Timing
3.5.4
Use of On-Chip Relaxation Oscillator
An internal relaxation oscillator can supply the reference frequency when an external frequency source or
crystal are not used. During a 56F801 boot or reset sequence, the relaxation oscillator is enabled by default,
and the PRECS bit in the PLLCR word is set to 0 (Section 3.5). If an external oscillator is connected, the
relaxation oscillator can be deselected instead by setting the PRECS bit in the PLLCR to 1. When this
occurs, the PRECSS bit in the PLLSR (prescaler clock select status register) data word also sets to 1. If a
changeover between internal and external oscillators is required at startup, internal device circuits
56F801 Technical Data, Rev. 17
Freescale Semiconductor
25
FREESCALE [ Freescale ]
