Register Descriptions
5.6.3.8
GPIOA Interrupt Priority Level (GPIOA IPL)—Bits 1–0
This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 0 through 2.
It is disabled by default.
•
•
•
•
00 = IRQ disabled (default)
01 = IRQ is priority level 0
10 = IRQ is priority level 1
11 = IRQ is priority level 2
5.6.4
Interrupt Priority Register 3 (IPR3)
Base + $3
Read
15
14
13
12
11
10
9
8
7
6
5
4
3
0
2
0
1
0
0
0
I2C_ADDR
IPL
ADCA_CC IPL TMR_3 IPL
TMR_2 IPL
TMR_1 IPL
TMR_0 IPL
Write
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
RESET
Figure 5-6 Interrupt Priority Register 3 (IPR3)
5.6.4.1
ADCA Conversion Complete Interrupt Priority Level
(ADCA_CC IPL)—Bits 15–14
This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 0 through 2.
They are disabled by default.
•
•
•
•
00 = IRQ disabled (default)
01 = IRQ is priority level 0
10 = IRQ is priority level 1
11 = IRQ is priority level 2
5.6.4.2
Timer Channel 3 Interrupt Priority Level (TMR_3 IPL)—Bits 13–12
This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 0 through 2.
They are disabled by default.
•
•
•
•
00 = IRQ disabled (default)
01 = IRQ is priority level 0
10 = IRQ is priority level 1
11 = IRQ is priority level 2
5.6.4.3
Timer Channel 2 Interrupt Priority Level (TMR_2 IPL)—Bits 11–10
This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 0 through 2.
They are disabled by default.
•
•
•
•
00 = IRQ disabled (default)
01 = IRQ is priority level 0
10 = IRQ is priority level 1
11 = IRQ is priority level 2
56F8014 Technical Data, Rev. 9
Freescale Semiconductor
Preliminary
53