FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
C
S
CS B
SCLK
C L K
S
SI
S
I
D
7
D
6
D
5
D
2
D
1
D
0
D
7
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D
6
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D
5
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D
2
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1
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D
0
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D
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D
6
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D
5
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D
2
v
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D
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7
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6
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2
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Notes
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Figure 10. Multiple 8-Bit Word SPI Communication
SERIAL INPUT COMMUNICATION
Table 10. Serial Input Address and Configuration Bit
Map
SPI communication is accomplished using 8-bit
messages. A message is transmitted by the MCU starting
with the MSB, D7, and ending with the LSB, D0 (Table 9).
Each incoming command message on the SI pin can be
interpreted using the following bit assignments: the MSB (D7)
is the watchdog bit and in some cases a register address bit
common to both outputs or specific to an output; the next
three bits, D6:D4, are used to select the command register;
and the remaining four bits, D3:D0, are used to configure and
control the outputs and their protection features.
Serial Input Data
SI
Register
D7 D6 D5 D4
D3
D2
D1
D0
STATR
OCR
s
x
0
0
0
0
0
1
0
SOA2
SOA1
SOA0
CSNS1 IN1_SPI CSNS0 IN0_SPI
EN EN
SOCHLR
CDTOLR
s
s
0
0
1
1
0
1
SOCHs SOCL2s SOCL1s SOCL0s
OL_DIS CD_DIS OCLT1s OCLT0s
Multiple messages can be transmitted in succession to
accommodate those applications where daisy chaining is
desirable, or to confirm transmitted data, as long as the
messages are all multiples of eight bits. Any attempt made to
latch in a message that is not eight bits will be ignored.
s
s
DICR
s
1
0
0
FAST
SR s
CSNS IN DIS s A/Os
high s
OSDR
WDR
NAR
0
1
0
1
x
1
1
1
1
1
0
0
1
1
1
1
1
0
0
1
0
0
0
0
OSD2
OSD1
WD1
0
OSD0
WD0
0
The 33984 has defined registers, which are used to
configure the device and to control the state of the output.
Table 10, summarizes the SI registers. The registers are
addressed via D6:D4 of the incoming SPI word (Table 9).
0
0
0
UOVR
TEST
UV_dis OV_dis
Table 9. SI Message Bit Assignment
Freescale Internal Use (Test)
Bit Sig SI Msg Bit
Message Bit Description
x = Don’t care.
s (SOA3 bit) = Selection of output: Logic [0] = HS0, Logic [1] =
HS1.
Register address bit for output selection.
Also used for watchdog: toggled to satisfy
watchdog requirements.
MSB
D7
Register address bits.
D6:D4
D3:D1
Used to configure the inputs, outputs, and
the device protection features and SO status
content.
Used to configure the inputs, outputs, and
the device protection features and SO status
content.
LSB
D0
33984
Analog Integrated Circuit Device Data
Freescale Semiconductor
24
FREESCALE [ Freescale ]
