PIN CONNECTIONS
Table 2. 33937 Pin Definitions (continued)
A functional description of each pin can be found in the Functional Pin Description section beginning on page 23.
Pin
Pin Name Pin Function
Formal Name
Definition
Gate Drive for output Phase A Low Side
45
PA_LS_G Power Output Phase A Low Side Gate
Drive
Source connection for Phase A High Side FET
Gate Drive for output Phase A High Side
46
47
PA_HS_S
Power Input
Phase A High Side
Source
PA_HS_G Power Output
Phase A High Side
Gate Drive
Bootstrap capacitor for Phase A
48
51
54
PA_BOOT
VLS
Analog Input
Analog Output
Power Input
Ground
Phase A Bootstrap
VLS Regulator
Voltage Power
Exposed Pad
VLS regulator output. Power supply for the gate drives
Power supply input for gate drives
VPWR
EP
Device will perform as specified with the Exposed Pad un-terminated
(floating) however, it is recommended that the Exposed Pad be terminated
to pin 29 (VSS) and system ground
33937
Analog Integrated Circuit Device Data
Freescale Semiconductor
6
FREESCALE [ Freescale ]
