FUNCTIONAL DESCRIPTIONS
INTRODUCTION
the CAUTION on page 28 for bootstrap capacitances greater
than 100 nF.
VPWR INPUT (VPWR)
VPWR is the power supply input for VLS and VDD. Current
flowing into this input recharges the bootstrap capacitors as
well as supplying power to the Low Side gate drivers and the
VDD regulator. An internal regulator regulates the actual gate
voltages. This pin can be connected to system battery
voltage if power dissipation is not a concern.
VLS REGULATOR (VLS)
VLS is the gate drive power supply regulated at
approximately 15 V. This is an internally generated supply
from VPWR. It is the source for the Low Side gate drive
voltage, and also the High Side bootstrap source. A low ESR
decoupling capacitor, capable of sourcing the pulsed drive
currents, must be connected between this pin and VSS. Use
the 33937A to avoid the CAUTION on page 28 for
capacitances greater than 3.5 µF.
EXPOSED PAD (EP)
The primary function of the Exposed Pad is to conduct
heat out of the device. This pad may be connected electrically
to the substrate of the device.The device will perform as
specified with the Exposed Pad un-terminated (floating).
However, it is recommended that the Exposed Pad be
terminated to pin 29 (VSS) and the system ground.
33937
Analog Integrated Circuit Device Data
Freescale Semiconductor
26
FREESCALE [ Freescale ]
