ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
Table 4. Static Electrical Characteristics (continued)
Characteristics noted under conditions 8.0 V ≤ VPWR = VSUP ≤ 40 V, -40°C ≤ TA ≤ 135°C, unless otherwise noted. Typical
values noted reflect the approximate parameter means at TA = 25°C under nominal conditions, unless otherwise noted.
Characteristic
Symbol
Min
Typ
Max
Unit
SUPERVISORY AND CONTROL CIRCUITS
Logic Inputs (Px_LS, Px_HS, EN1, EN2) (31)
High Level Input Voltage Threshold
Low Level Input Voltage Threshold
V
VIH
VIL
–
–
–
2.1
–
0.9
Logic Inputs (SI, SCLK, CS) (30), (31)
High Level Input Voltage Threshold
Low Level Input Voltage Threshold
V
VIH
VIL
–
–
–
2.1
–
0.9
Input Logic Threshold Hysteresis (30)
VIHYS
mV
µA
Inputs Px_LS, SI, SCLK, CS, Px_HS, EN1, EN2
100
8.0
250
–
450
18
Input Pull-down Current, (Px_LS, SI, SCLK, EN1, EN2)
IINPD
IINPU
CIN
0.3 VDD ≤ VIN ≤ VDD
Input Pull-up Current, (CS, Px_HS) (32)
0 ≤ VIN ≤ 0.7 VDD
Input Capacitance (30)
10
–
25
µA
pF
0.0 V ≤ VIN ≤ 5.5 V
RST Threshold (33)
–
15
–
–
VTH_RST
RRST
1.0
2.1
V
RST Pull-down Resistance
0.3 VDD ≤ VIN ≤ VDD
kΩ
40
60
85
Power-ON RST Threshold, (VDD Falling)
SO High Level Output Voltage
VTHRST
VSOH
3.4
4.0
4.5
V
V
I
OH = 1.0 mA
SO Low Level Output Voltage
OL = 1.0 mA
0.9 VDD
–
–
–
0.1 VDD
1.0
VSOL
ISO_LEAK_T
CSO_T
VOH
V
µA
pF
V
I
–
SO Tri-state Leakage Current
CS = 0.7 VDD, 0.3 VDD = VSO = 0.7 VDD
-1.0
–
SO Tri-state Capacitance (30), (34)
0.0 V ≤ VIN ≤ 5.5 V
–
0.85 VDD
–
15
–
–
INT High Level Output Voltage
I
OH = -500 µA
INT Low Level Output Voltage
OL = 500 µA
VDD
0.5
VOL
V
I
–
THERMAL WARNING
Thermal Warning Temperature (30), (35)
Thermal Hysteresis (30)
TWARN
THYST
150
8.0
170
10
185
12
°C
°C
Notes
30. This parameter is guaranteed by design, not production tested.
31. Logic threshold voltages derived relative to a 3.3 V 10% system.
32. Pull-up circuits will not allow back biasing of VDD.
33. There are two elements in the RST circuit: 1) one generally lower threshold enables the internal regulator; 2) the second removes the
reset from the internal logic.
34. This parameter applies to the OFF state (tri-stated) condition of SO is guaranteed by design but is not production tested.
35. The Thermal Warning circuit does not force IC shutdown above this temperature. It is possible to set a bit in the MASK register to
generate an interrupt when overtemperature is detected, and the status bit will always indicate if any of the three individual Thermal
Warning circuits in the IC sense a fault.
33937
Analog Integrated Circuit Device Data
Freescale Semiconductor
13
FREESCALE [ Freescale ]
