欢迎访问ic37.com |
会员登录 免费注册
发布采购

33910_10 参数 Datasheet PDF下载

33910_10图片预览
型号: 33910_10
PDF下载: 下载PDF文件 查看货源
内容描述: LIN系统基础芯片,高 [LIN System Basis Chip with High]
分类和应用:
文件页数/大小: 90 页 / 1134 K
品牌: FREESCALE [ Freescale ]
 浏览型号33910_10的Datasheet PDF文件第53页浏览型号33910_10的Datasheet PDF文件第54页浏览型号33910_10的Datasheet PDF文件第55页浏览型号33910_10的Datasheet PDF文件第56页浏览型号33910_10的Datasheet PDF文件第58页浏览型号33910_10的Datasheet PDF文件第59页浏览型号33910_10的Datasheet PDF文件第60页浏览型号33910_10的Datasheet PDF文件第61页  
MC33910BAC / MC34910BAC  
ELECTRICAL CHARACTERISTICS  
STATIC ELECTRICAL CHARACTERISTICS  
Table 33. Static Electrical Characteristics (continued)  
Characteristics noted under conditions 5.5 V VSUP 18 V, -40°C TA 125°C for the 33910 and -40°C TA 85°C for the  
34910, unless otherwise noted. Typical values noted reflect the approximate parameter mean at TA = 25°C under nominal  
conditions, unless otherwise noted.  
Characteristic  
WINDOW WATCHDOG CONFIGURATION PIN (WDCONF)  
External Resistor Range  
Symbol  
Min  
Typ  
Max  
Unit  
R
20  
200  
15  
kΩ  
EXT  
Watchdog Period Accuracy with External Resistor (Excluding Resistor  
Accuracy)(102)  
WD  
-15  
%
ACC  
ANALOG MULTIPLEXER  
Internal Chip Temperature Sense Gain  
STTOV  
10.5  
5.25  
mV/K  
mV  
VSENSE Input Divider Ratio (RATIOVSENSE = VVSENSE / VADOUT0  
5.5 V < VSUP < 27 V  
)
RATIOVSENSE  
5.0  
5.5  
VSENSE Output Related Offset  
-40°C < TA < -20°C  
OFFSETVSENS  
-30  
-45  
30  
45  
E
ANALOG OUTPUT (ADOUT0)  
Maximum Output Voltage  
-5.0 mA < IO < 5.0 mA  
VOUT_MAX  
V
V
VDD - 0.35  
0.0  
VDD  
0.35  
Minimum Output Voltage  
-5.0 mA < IO < 5.0 mA  
VOUT_MIN  
RXD OUTPUT PIN (LIN PHYSICAL LAYER) (RXD)  
Low-state Output Voltage  
IOUT = 1.5 mA  
VOL  
V
V
0.0  
0.8  
High-state Output Voltage  
IOUT = -250 µA  
VOH  
VDD-0.8  
VDD  
TXD INPUT PIN (LIN PHYSICAL LAYER) (TXD)  
Low-state Input Voltage  
VIL  
VIH  
-0.3  
0.7 x VDD  
10  
0.3 x nVDD  
VDD + 0.3  
30  
V
V
High-state Input Voltage  
Pin Pull-up Current, 0 < VIN < 3.5 V  
IPUIN  
20  
µA  
Notes  
102. Watchdog timing period calculation formula: tPWD [ms] = 0.466 * (REXT - 20) + 10 (REXT in kΩ)  
33910  
Analog Integrated Circuit Device Data  
Freescale Semiconductor  
57  
 复制成功!