FUNCTIONAL DEVICE OPERATION
PROTECTION AND DIAGNOSTIC FEATURES
detection levels, defined by IOCH and IOCL, are illustrated in
UNDER-VOLTAGE SHUTDOWN (LATCHING OR
NON-LATCHING)
Figure 6, page 13. The eight different over-current low detect
levels (IOCL0:IOCL7) are illustrated in Figure 6.
The output(s) will latch off at some battery voltage below
6.0 V. As long as the VDD level stays within the normal
If the load current level ever reaches the selected over-
current low detection level and the over-current condition
specified range, the internal logic states within the device will
be sustained.
exceeds the programmed over-current time period (tOC ), the
x
device will latch the output OFF.
In the case where battery voltage drops below the under-
voltage threshold (VPWRUV) output will turn off, FS will go to
If at any time the current reaches the selected IOCH level,
logic 0, and the fault register UVF bit will be set to 1.
then the device will immediately latch the fault and turn OFF
the output, regardless of the selected tOCH driver.
Two cases need to be considered when the battery level
recovers :
For both cases, the device output will stay off indefinitely
until the device is commanded OFF and then ON again.
• If outputs command are low, FS will go to logic 1 but the
UVF bit will remain set to 1 until the next read operation
(warning report).
• If the output command is ON, then FS will remain at
logic 0. The output must be turned OFF and ON again
to re-enable the state of output and release FS. The
UVF bit will remain set to 1 until the next read operation.
OVER-VOLTAGE FAULT (NON-LATCHING)
The 33874 shuts down the output during an over-voltage
fault (OVF) condition on the VPWR pin. The output remains
in the OFF state until the over-voltage condition is removed.
When experiencing this fault, the OVF fault bit is set in the bit
D1 and cleared after either a valid SPI read or a power reset
of the device.
The under-voltage protection can be disabled through SPI
(bit UV_dis = 1). In this case, the FS does not report any
under-voltage fault condition, UVF bit is set to 1, and the
output state is not changed as long as the battery voltage
does not drop any lower than 2.5 V.
The over-voltage protection can be disabled through SPI
(bit OV_DIS). When disabled, the returned SO bit OD13 still
reflects any over-voltage condition (over-voltage warning).
The daisy chain feature is available under VDD in nominal
conditions.
33874
Analog Integrated Circuit Device Data
Freescale Semiconductor
20
FREESCALE [ Freescale ]
