Clocking
Table 59. CSB Frequency Options for Host Mode (continued)
Input Clock Frequency (MHz)2
CFG_CLKIN_DIV
csb_clk :
SPMF
16.67
25
33.33
66.67
at Reset1
Input Clock Ratio2
csb_clk Frequency (MHz)
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
High
High
High
High
High
High
High
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
0000
0010
0011
0100
0101
0110
0111
1000
6 : 1
7 : 1
100
150
175
200
225
250
275
300
325
200
233
266
300
333
116
133
150
166
183
200
216
8 : 1
9 : 1
10 : 1
11 : 1
12 : 1
13 : 1
14 : 1
15 : 1
16 : 1
2 : 1
233
250
266
133
200
266
333
3 : 1
100
133
166
200
233
4 : 1
5 : 1
6 : 1
7 : 1
8 : 1
1
2
CFG_CLKIN_DIV selects the ratio between CLKIN and PCI_SYNC_OUT.
CLKIN is the input clock in host mode; PCI_CLK is the input clock in agent mode.
Table 60. CSB Frequency Options for Agent Mode
Input Clock Frequency (MHz)2
CFG_CLKIN_DIV
at Reset1
csb_clk :
SPMF
16.67
25
33.33
66.67
Input Clock Ratio2
csb_clk Frequency (MHz)
Low
Low
Low
Low
0010
0011
0100
0101
2 : 1
3 : 1
4 : 1
5 : 1
133
200
266
333
100
100
125
133
166
MPC8349EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 13
Freescale Semiconductor
70
FREESCALE [ Freescale ]
