IPIC
15.2 GPIO AC Timing Specifications
Table 50 provides the GPIO input and output AC timing specifications.
1
Table 50. GPIO Input AC Timing Specifications
Parameter
Symbol2
Min
Unit
ns
GPIO inputs—minimum pulse width
tPIWID
20
Notes:
1. Input specifications are measured from the 50 percent level of the signal to the 50 percent level of the rising edge of CLKIN.
Timings are measured at the pin.
2. GPIO inputs and outputs are asynchronous to any visible clock. GPIO outputs should be synchronized before use by external
synchronous logic. GPIO inputs must be valid for at least tPIWID ns to ensure proper operation.
16 IPIC
This section describes the DC and AC electrical specifications for the external interrupt pins.
16.1 IPIC DC Electrical Characteristics
Table 51 provides the DC electrical characteristics for the external interrupt pins.
1
Table 51. IPIC DC Electrical Characteristics
Parameter
Input high voltage
Symbol
Condition
Min
Max
Unit
Notes
VIH
VIL
IIN
—
—
2.0
–0.3
—
OVDD + 0.3
V
V
—
—
—
2
Input low voltage
Input current
0.8
5
—
μA
V
Output low voltage
Output low voltage
Notes:
VOL
IOL = 8.0 mA
IOL = 3.2 mA
—
0.5
0.4
V
—
V
2
OL
1. This table applies for pins IRQ[0:7], IRQ_OUT, and MCP_OUT.
2. IRQ_OUT and MCP_OUT are open-drain pins; thus VOH is not relevant for those pins.
16.2 IPIC AC Timing Specifications
Table 52 provides the IPIC input and output AC timing specifications.
1
Table 52. IPIC Input AC Timing Specifications
Parameter
Symbol2
Min
20
Unit
IPIC inputs—minimum pulse width
tPICWID
ns
Notes:
1. Input specifications are measured at the 50 percent level of the IPIC input signals. Timings are measured at the pin.
2. IPIC inputs and outputs are asynchronous to any visible clock. IPIC outputs should be synchronized before use by external
synchronous logic. IPIC inputs must be valid for at least tPICWID ns to ensure proper operation in edge triggered mode.
MPC8349EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 13
Freescale Semiconductor
51