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1500457 参数 Datasheet PDF下载

1500457图片预览
型号: 1500457
PDF下载: 下载PDF文件 查看货源
内容描述: 综合主机处理器的硬件规格 [Integrated Host Processor Hardware Specifications]
分类和应用:
文件页数/大小: 87 页 / 680 K
品牌: FREESCALE [ FREESCALE SEMICONDUCTOR, INC ]
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Clock Input Timing
4
4.1
Clock Input Timing
DC Electrical Characteristics
Table 6. CLKIN DC Timing Specifications
Parameter
Condition
0 V
V
IN
OV
DD
0 V
V
IN
0.5 V or
OV
DD
– 0.5 V
V
IN
OV
DD
0.5 V
≤V
IN
OV
DD
– 0.5 V
Symbol
V
IH
V
IL
I
IN
I
IN
I
IN
Min
2.7
–0.3
Max
OV
DD
+ 0.3
0.4
±10
±10
±50
Unit
V
V
μA
μA
μA
This section provides the clock input DC and AC electrical characteristics for the device.
provides the clock input (CLKIN/PCI_SYNC_IN) DC timing specifications for the MPC8349EA.
Input high voltage
Input low voltage
CLKIN input current
PCI_SYNC_IN input current
PCI_SYNC_IN input current
4.2
AC Electrical Characteristics
The primary clock source for the MPC8349EA can be one of two inputs, CLKIN or PCI_CLK, depending
on whether the device is configured in PCI host or PCI agent mode.
provides the clock input
(CLKIN/PCI_CLK) AC timing specifications for the device.
Table 7. CLKIN AC
Timing Specifications
Parameter/Condition
CLKIN/PCI_CLK frequency
CLKIN/PCI_CLK cycle time
CLKIN/PCI_CLK rise and fall time
CLKIN/PCI_CLK duty cycle
CLKIN/PCI_CLK jitter
Symbol
f
CLKIN
t
CLKIN
t
KH
, t
KL
t
KHK
/t
CLKIN
Min
15
0.6
40
Typical
1.0
Max
66
2.3
60
±150
Unit
MHz
ns
ns
%
ps
Notes
1, 6
2
3
4, 5
Notes:
1.
Caution:
The system, core, USB, security, and TSEC must not exceed their respective maximum or minimum operating
frequencies.
2. Rise and fall times for CLKIN/PCI_CLK are measured at 0.4 and 2.7 V.
3. Timing is guaranteed by design and characterization.
4. This represents the total input jitter—short term and long term—and is guaranteed by design.
5. The CLKIN/PCI_CLK driver’s closed loop jitter bandwidth should be < 500 kHz at –20 dB. The bandwidth must be set low to
allow cascade-connected PLL-based devices to track CLKIN drivers with the specified jitter.
6. Spread spectrum clocking is allowed with 1% input frequency down-spread at maximum 50 KHz modulation rate regardless
of input frequency.
MPC8349EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 13
12
Freescale Semiconductor