F81218
Bit
7:0
Name
R/W
Description
DEC1_BASE[15:8]
R/W
Address high byte for ADD_DEC1/LPC_DEC1 .
6.9.3 Address Decoder Select Register 1 – index 61h
Power-on default [7:0] = 0x00h.
Bit
7:0
Name
R/W
Description
DEC1_BASE[7:0] R/W
Address low byte for ADD_DEC1/LPC_DEC1.
6.9.4 Address Mask Register – index 62h
Power-on default [7:0] = 0x00h.
Bit
7:3
2:0
Name
Reserved
DEC1_SEL[2:0]
R/W
R/W
R/W
Description
Return 0 when read.
000 : Decode all 16 bits .
001 : Decode bit 15:1
010 : Decode bit 15:2
011 : Decode bit 15:3
100 : Decode bit 15:4
6.9.5 IRQIN1 Channel Select Register (Only for LPC) – index 70h
Power-on default [7:0] = 0x00h.
Bit
7:6
Name
Reserved
R/W
R/W
R/W
Description
Return 0 when read.
5
IRQIN1_MODE
0 : PCI IRQ sharing mode.
1 : ISA IRQ sharing mode.
This bit is effective in IRQ sharing mode.
0 : IRQ is not sharing with other device.
1 : IRQ is sharing with other device.
4
IRQIN1_SHAR
SELIRQIN1[3:0]
R/W
R/W
3:0
In LPC mode , select the Serial IRQ channel.
-40-
August, 2007
V0.33P
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
