F81218
Bit
Name
R/W
Description
7
CLRGPOE_EN
R/W
0 : GP14, GP13, GP12, GP11, GP10 is in original mode when
Watchdog timeout occurred.
1 : GP14, GP13, GP12, GP11, GP10 is reset to input mode when
Watchdog timeout occurred.
0 : GP16 is in input mode.
6
5
4
3
2
1
0
GP16_OE
GP15_OE
GP14_OE
GP13_OE
GP12_OE
GP11_OE
GP10_OE
R/W
R/W
R/W
R/W
R/W
R/W
R/W
1 : GP16 is in output mode.
0 : GP15 is in input mode.
1 : GP15 is in output mode.
0 : GP14 is in input mode.
1 : GP14 is in output mode.
0 : GP13 is in input mode.
1 : GP13 is in output mode.
0 : GP12 is in input mode.
1 : GP12 is in output mode.
0 : GP11 is in input mode.
1 : GP11 is in output mode.
0 : GP10 is in input mode.
1 : GP10 is in output mode.
6.11.3 GPIO Port 2 Output Data Control Register – index F2h
Power-on default [7:0] = 0xFFh.
Bit
Name
R/W
Description
0 : GP27 is output low in output mode.
1 : GP27 is tri-state.
7
GP27_OUT
R/W
6
5
4
3
2
GP26_OUT
GP25_OUT
GP24_OUT
GP23_OUT
GP22_OUT
R/W
R/W
R/W
R/W
R/W
0 : GP26 is output low in output mode.
1 : GP26 is tri-state.
0 : GP25 is output low in output mode.
1 : GP25 is tri-state.
0 : GP24 is output low in output mode.
1 : GP24 is tri-state.
0 : GP23 is output low in output mode.
1 : GP23 is tri-state.
0 : GP22 is output low in output mode.
1 : GP22 is tri-state.
-44-
August, 2007
V0.33P
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
