F81218
6.8.5 IRQIN0 Channel Select Register (Only for LPC) – index 70h
Power-on default [7:0] = 0x00h.
Bit
7:6
Name
Reserved
R/W
R/W
R/W
Description
Return 0 when read.
5
IRQIN0_MODE
0 : PCI IRQ sharing mode.
1 : ISA IRQ sharing mode.
This bit is effective in IRQ sharing mode.
0 : IRQ is not sharing with other device.
1 : IRQ is sharing with other device.
4
IRQIN0_SHAR
SELRQIN0[3:0]
R/W
R/W
3:0
In LPC mode , select the Serial IRQ channel.
03h : use serial IRQ channel 3 in LPC mode.
04h : use serial IRQ channel 4 in LPC mode.
05h : use serial IRQ channel 5 in LPC mode.
09h : use serial IRQ channel 9 in LPC mode.
0Ah : use serial IRQ channel 10 in LPC mode.
0Bh : use serial IRQ channel 11 in LPC mode.
Otherwise will disable the interrupt.
6.9 Address Decoder 1 Device Control Register (LDN 7)
6.9.1 Device Enable Register – index 30h
Power-on default [7:0] = 0x00h.
Bit
7:1
Name
Reserved
R/W
R/W
R/W
Description
Return 0 when read.
0
ADDEC1_EN
0 : Disable Address Decoder 1.
1 : Enable Address Decoder 1.
6.9.2 Address Decoder Select Register 0 – index 60h
Power-on default [7:0] = 0x00h.
-39-
August, 2007
V0.33P
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
