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F81218 参数 Datasheet PDF下载

F81218图片预览
型号: F81218
PDF下载: 下载PDF文件 查看货源
内容描述: ISA / LPC 6 UART数据表 [ISA/LPC to 6 UART Datasheet]
分类和应用: PC
文件页数/大小: 64 页 / 1414 K
品牌: FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
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F81218  
0Ah : use serial IRQ channel 10 in LPC mode or use ISA_IRQE in  
ISA mode.  
0Bh : use serial IRQ channel 11 in LPC mode or use ISA_IRQF in  
ISA mode.  
Otherwise will disable the interrupt.  
6.5.5 UART 4 Clock Select Register – index F0h  
Power-on default [7:0] = 0x00h.  
Bit  
7:5  
Name  
Reserved  
R/W  
R/W  
R/W  
Description  
Return 0 when read.  
4
RS485  
0: The RTS# is controlled by programming MCR[1]. (offset +4)  
1: The RTS# is drive high when transmitting data and sink low when  
receiving data.  
3:2  
1:0  
Reserved  
R/W  
R/W  
Return 0 when read.  
SELURCCLK1  
SELURCCLK0  
00 : UART 3 clock source is 1.8462MHz ( 24MHz/13 )  
01/10/11 selection reserved.  
6.6 UART 5 Device Control Register (LDN 4)  
6.6.1 Device Enable Register – index 30h  
Power-on default [7:0] = 0x01h when SOUT5/PS_338_IRQE is pull-up, else 0x00h.  
Bit  
7:1  
Name  
Reserved  
URE_EN  
R/W  
R/W  
R/W  
Description  
Return 0 when read.  
0 : Disable UART 5.  
1 : Enable UART 5.  
0
6.6.2 I/O Port Select Register – index 60h  
Power-on default [7:0] = 0x03h when SOUT5/PS_338_IRQE is pull-up, else 0x00h.  
Bit Name R/W Description  
7:0 URE_BASE[15:8] R/W UART 5 I/O Port Address high byte.  
-34-  
August, 2007  
V0.33P  
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