F81218
bit time. IRTX acts as a transmit pin and IRRX acts as a receiving one. As for detail description,
please refer to register description.
5.4 Watch Dog Timer Function
Watch dog timer is provided for system controlling. If time-out can trigger one signal to low
level, the signal default is tri-state (need external pull up resister).
The time interval has three ways:
One is the hardware power on setting to enable, timer set to 10 second (24MHz). If
48MHz clock input, the timer is set to 5 second.
Two is programmed by registers.
The other is set the base address into registers, and use the base address the control it.
The timer unit has three kinds: 10mS, 1S, 1Min.
5.4.1 Watchdog Port Register
5.4.1.1 Timer Status and Control Register – Base + 0
Power-on default [7:0] = 0x02 when DTR3#/PS_WDT is pull-up, else 0x0.
Bit
7:3
2:1
Name
Reserved
R/W
R/W
R/W
Description
Return 0 when read.
00 : Timer Unit is 10ms.
01 : Timer Unit is 1 second
10 : Timer Unit is 1 minute.
11 : reserved.
WDT_UNIT[1:0]
WDT_EVENT
0
R/W
When read
0 : no time out occur.
1 : time out has occurred.
when write
0 : no action
1 : clear the time out status.
5.4.1.2 Timer Count Number Register – Base + 1
Power-on default [7:0] = 0x0Ah when DTR3#/PS_WDT is pull-up , else 0x00h.
Bit
7:0
Name
R/W
Description
WDT_CNT[7:0]
R/W
The number of count for watchdog timer.
-17-
August, 2007
V0.33P
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
