F81216
outportb(0x4f, 0x04); //Set UART 2 interrupt channel to IRQ 4
outportb(0x4e, 0x30); //Select LDN 1 register index 0x30
outportb(0x4f, 0x01); //Enable UART 2
outportb(0x4e, 0x07); //Select register index 0x07
outportb(0x4f, 0x02); //Select LDN 2
outportb(0x4e, 0x60); //Select LDN 2 register index 0x60
outportb(0x4f, 0x03); //Set UART 3 base address high byte to 0x03
outportb(0x4e, 0x61); //Select LDN 2 register index 0x61
outportb(0x4f, 0xe8); //Set UART 3 base address low byte to 0xe8
outportb(0x4e, 0x70); //Select LDN 2 register index 0x70
outportb(0x4f, 0x05); //Set UART 3 interrupt channel to IRQ 5
outportb(0x4e, 0x30); //Select LDN 2 register index 0x30
outportb(0x4f, 0x01); //Enable UART 3
outportb(0x4e, 0x07); //Select register index 0x07
outportb(0x4f, 0x03); //Select LDN 3
outportb(0x4e, 0x60); //Select LDN 3 register index 0x60
outportb(0x4f, 0x02); //Set UART 4 base address high byte to 0x02
outportb(0x4e, 0x61); //Select LDN 3 register index 0x61
outportb(0x4f, 0xe8); //Set UART 4 base address low byte to 0xe8
outportb(0x4e, 0x70); //Select LDN 3 register index 0x70
outportb(0x4f, 0x09); //Set UART 4 interrupt channel to IRQ 9
outportb(0x4e, 0x30); //Select LDN 3 register index 0x30
outportb(0x4f, 0x01); //Enable UART 4
outportb(0x4e, 0xaa); //Exit configuration mode
2. Set Watch Dog timer base address 0x300~0x301:
outportb(0x4e, 0x77);
outportb(0x4e, 0x77); //Entry configuration mode
outportb(0x4e, 0x07); //Select register index 0x07
outportb(0x4f, 0x08); //Select LDN 8
outportb(0x4e, 0x60); //Select LDN 8 register index 0x60
outportb(0x4f, 0x03); //Set Watch Dog timer base address high byte to 0x03
outportb(0x4e, 0x61); //Select LDN 8 register index 0x61
outportb(0x4f, 0x00); //Set Watch Dog Timer base address low byte to 0x00
outportb(0x4e, 0x30); //Select LDN 8 register index 0x30
-18-
August, 2007
V0.32P
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
