F81216
2
3
IRQ1
SMI#
5
8
4
IRQ3
11
14
17
20
23
26
29
32
35
38
41
44
47
50
53
56
59
62
95
5
IRQ4
6
IRQ5
7
IRQ6
8
IRQ7
9
IRQ8
10
11
12
13
14
15
16
17
18
19
20
21
32:22
IRQ9
IRQ10
IRQ11
IRQ12
IRQ13
IRQ14
IRQ15
IOCHCK#
INTA#
INTB#
INTC#
INTD#
Unassigned
5.5.3 Stop Frame
After all IRQ/Data Frames have completed, the host controller will terminate SERIRQ by
a Stop frame. Only the host controller can initiate the Stop frame by driving SERIRQ low for 2 or 3
clocks. If the Stop Frame is low for 2 clocks, the next SERIRQ cycle's Sample mode is the Quiet
mode. If the Stop Frame is low for 3 clocks, the next SERIRQ cycle's Sample mode is the
Continuous mode.
6. Register Description
Registers are programmed by port 0x4E and 0x4F. 0x4E is the index port and 0x4F is the data port .
-16-
August, 2007
V0.32P
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
