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F81216 参数 Datasheet PDF下载

F81216图片预览
型号: F81216
PDF下载: 下载PDF文件 查看货源
内容描述: LPC 4 UART数据表 [LPC to 4 UART Datasheet]
分类和应用: PC
文件页数/大小: 37 页 / 755 K
品牌: FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
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F81216  
5.5.1 Start Frame  
There are two modes of operation for the SERIRQ Start frame: Quiet mode and Continuous  
mode. In the Quiet mode, the peripheral drives the SERIRQ signal active low for one clock, and  
then tri-states it. This brings all the states machines of the peripherals from idle to active states.  
The host controller will then take over driving SERIRQ signal low in the next clock and will continue  
driving the SERIRQ low for programmable 3 to 7 clock periods. This makes the total number of  
clocks low for 4 to 8 clock periods. After these clocks, the host controller will drive the SERIRQ high  
for one clock and then tri-states it. In the Continuous mode, only the host controller initiates the  
START frame to update IRQ/Data line information. The host controller drives the SERIRQ signal  
low for 4 to 8 clock periods. Upon a reset, the SERIRQ signal is defaulted to the Continuous mode  
for the host controller to initiate the first Start frame.  
5.5.2 IRQ/Data Frame  
Once the start frame has been initiated, all the peripherals must start counting frames based  
on the rising edge of the start pulse. Each IRQ/Data Frame is three clocks: Sample phase,  
Recovery phase, and Turn-around phase. During the Sample phase, the peripheral drives SERIRQ  
low if the corresponding IRQ is active. If the corresponding IRQ is inactive, then SERIRQ must be  
left tri-stated. During the Recovery phase, the peripheral device drives the SERIRQ high. During  
the Turn-around phase, the peripheral device left the SERIRQ tri-stated. The IRQ/Data Frame has  
a number of specific order, as shown in Table 5-1. The F81216 is only support IRQ3, IRQ4, IRQ5,  
IRQ9, IRQ10, and IRQ11.  
Table 5-1 IRQSER Sampling periods  
IRQ/Data Frame  
Signal Sampled  
# of clocks past Start  
1
IRQ0  
2
-15-  
August, 2007  
V0.32P  
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