7.38 VIDKEY Protection Register – Index 32h
Power-on default [7:0] =0000_0000b
Bit
Name
VIDKEY
R/W
PWR
Description
7-0
R/W
VSB3V VID Key for protection the VIDOUT. If would like to program VID Output
Data Register, the sequential key should be programmed first. The VID
Output Register is disable in the default (VSB3V power on). The sequential
keys are defined as 0x32, 0x5d, 0x42, 0xac. And the exit key is 0x35.
7.39 VID Input Latch Register – Index 33h
Power-on default [7:0] =000x_xxxxb
Bit
7-6
5-0
Name
Reserved
LVIDIN
R/W
RO
PWR
Description
--
VSB3V
Reserved, read return 0.
VIDIN data.
RO
7.40 RSTOUT Control Register – Index 34h
Power-on default [7:0] =0000_0000b
Bit
7-3
2
Name
Reserved
R/W
RO
PWR
VSB3V
VSB3V
VSB3V
Description
SEL_RST_2S
RSTOUT_OINV
STS_RSTOUT
R/W
When set this bit to 1, the RSTOUT low pulse width is 2 Sec, if set to
0 the low pulse width is 100ms.
1
0
R/W
R/W
RSTOUT# output level inverting. When write 1, the output pin will be
inverted. Default is low active when time is out.
Indicate RSTOUT is occurred. Write 1 to clear this bit. Writing 0 is
invalid.
7.41 RSTOUT Control Register – Index 35h
Power-on default [7:0] =0000_0000b
Bit
Name
R/W
PWR
Description
- 31 -
July, 2007
V0.24P
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
