7.31 GP2x Edge Detector Enable Register – Index 0x28
Power-on default [7:0] =0000_0000b
Bit
Name
R/W
PWR
Description
7
EN_GP27EDGE
R/W
VSB3V Enable GPIO27 Edge Detector. If set to 1, enable GPIO27 edge detection.
Default is disabled.
6
5
4
3
2
1
0
EN_GP26EDGE
EN_GP25EDGE
EN_GP24EDGE
EN_GP23EDGE
EN_GP22EDGE
EN_GP21EDGE
EN_GP20EDGE
R/W
R/W
R/W
R/W
R/W
R/W
R/W
VSB3V Enable GPIO26 Edge Detector. If set to 1, enable GPIO26 edge detection.
Default is disabled.
VSB3V Enable GPIO25 Edge Detector. If set to 1, enable GPIO25 edge detection.
Default is disabled.
VSB3V Enable GPIO24 Edge Detector. If set to 1, enable GPIO24 edge detection.
Default is disabled.
VSB3V Enable GPIO23 Edge Detector. If set to 1, enable GPIO23 edge detection.
Default is disabled.
VSB3V Enable GPIO22 Edge Detector. If set to 1, enable GPIO22 edge detection.
Default is disabled.
VSB3V Enable GPIO21 Edge Detector. If set to 1, enable GPIO21 edge detection.
Default is disabled.
VSB3V Enable GPIO20 Edge Detector. If set to 1, enable GPIO20 edge detection.
Default is disabled.
7.32 Edge Detector Status Register – Index 0x29
Power-on default [7:0] =0000_0000b
Bit
Name
R/W
PWR
Description
7
STS_GP27EDGE R/W
STS_GP26EDGE R/W
STS_GP25EDGE R/W
STS_GP24EDGE R/W
STS_GP23EDGE R/W
VSB3V Indicate GPIO27 Edge Status. If set to 1, the edge of GPIO27 has
occurred. Write 1 to clear this bit. Writing 0 is invalid.
6
5
4
3
VSB3V Indicate GPIO26 Edge Status. If set to 1, the edge of GPIO26 has
occurred. Write 1 to clear this bit. Writing 0 is invalid.
VSB3V Indicate GPIO25 Edge Status. If set to 1, the edge of GPIO25 has
occurred. Write 1 to clear this bit. Writing 0 is invalid.
VSB3V Indicate GPIO24 Edge Status. If set to 1, the edge of GPIO24 has
occurred. Write 1 to clear this bit. Writing 0 is invalid.
VSB3V Indicate GPIO23 Edge Status. If set to 1, the edge of GPIO23 has
occurred. Write 1 to clear this bit. Writing 0 is invalid.
- 27 -
July, 2007
V0.24P
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
