F75111
by 0x2C bit6.
5
4
3
2
1
0
GP25_ENDB
GP24_ENDB
GP23_ENDB
GP22_ENDB
GP21_ENDB
GP20_ENDB
R/W
R/W
R/W
R/W
R/W
R/W
VSB3V Enable GPIO25 input de-bounce with 7u or 25ms second that selected
by 0x2C bit5.
VSB3V Enable GPIO24 input de-bounce with 7u or 25ms second that selected
by 0x2C bit4.
VSB3V Enable GPIO23 input de-bounce with 7u or 25ms second that selected
by 0x2C bit3.
VSB3V Enable GPIO22 input de-bounce with 7u or 25ms second that selected
by 0x2C bit2.
VSB3V Enable GPIO21 input de-bounce with 7u or 25ms second that selected
by 0x2C bit1.
VSB3V Enable GPIO20 input de-bounce with 7u or 25ms second that selected
by 0x2C bit0.
7.30 GPIO2x Pulse Inverse Register – Index 27h
Power-on default [7:0] =0000_0000b
Bit
Name
R/W
R/W
PWR
Description
7
GP27_PULSINV
VSB3V GPIO 27 Pulse inversed. If the pulse inverse is selected, the output
pulse is high pulse. Default low pulse. The pulse width is defined in
CR24.
6
5
4
3
2
GP26_PULSINV
GP25_PULSINV
GP24_PULSINV
GP23_PULSINV
GP22_PULSINV
R/W
R/W
R/W
R/W
R/W
VSB3V GPIO 26 Pulse inversed. If the pulse inverse is selected, the output
pulse is high pulse. Default low pulse. The pulse width is defined in
CR24.
VSB3V GPIO25 Pulse inversed. If the pulse inverse is selected, the output
pulse is high pulse. Default low pulse. The pulse width is defined in
CR24.
VSB3V GPIO24 Pulse inversed. If the pulse inverse is selected, the output
pulse is high pulse. Default low pulse. The pulse width is defined in
CR24.
VSB3V GPIO23 Pulse inversed. If the pulse inverse is selected, the output
pulse is high pulse. Default low pulse. The pulse width is defined in
CR24.
VSB3V GPIO22 Pulse inversed. If the pulse inverse is selected, the output
pulse is high pulse. Default low pulse. The pulse width is defined in
- 26 -
July, 2007
V0.27P
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
