F75111
7.27 GPIO2x Pulse Width Control Register – Index 24h
Power-on default [7:0] =0000_0000b
Bit
7:2
1:0
Name
Reserved
R/W
PWR
Description
R/W
VSB3V Reserved. Read return 0.
GP2_PLSWD[1:0 R/W
]
VSB3V GPIO2x pulse width. If set the GPIO2x to pulse mode, the pulse width
can be defined as follows.
00b – 500us (Default)
01b – 1ms
10b – 20ms
11b – 100ms
7.28 GPIO2x Pull-up Resistor Control Register – Index 25h
Power-on default [7:0] =0000_0000b
Bit
Name
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
PWR
Description
7
GP27_RESON
GP26_RESON
GP25_RESON
GP24_RESON
GP23_RESON
GP22_RESON
GP21_RESON
GP20_RESON
VSB3V Turn on the GPIO27 internal pull-up resistor.
VSB3V Turn on the GPIO26 internal pull-up resistor.
VSB3V Turn on the GPIO25 internal pull-up resistor.
VSB3V Turn on the GPIO24 internal pull-up resistor.
VSB3V Turn on the GPIO23 internal pull-up resistor.
VSB3V Turn on the GPIO22 internal pull-up resistor.
VSB3V Turn on the GPIO21 internal pull-up resistor.
VSB3V Turn on the GPIO20 internal pull-up resistor.
6
5
4
3
2
1
0
7.29 GPIO2x Input De-bounce Register – Index 26h
Power-on default [7:0] =0000_0000b
Bit
Name
R/W
PWR
Description
7
GP27_ENDB
R/W
VSB3V Enable GPIO27 input de-bounce with 7u or 25ms second that selected
by 0x2C bit7.
6
GP26_ENDB
R/W
VSB3V Enable GPIO26 input de-bounce with 7u or 25ms second that selected
- 25 -
July, 2007
V0.27P
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
