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F71872FG 参数 Datasheet PDF下载

F71872FG图片预览
型号: F71872FG
PDF下载: 下载PDF文件 查看货源
内容描述: 超级H / W监控+ LPC IO [Super H/W Monitor + LPC IO]
分类和应用: 监控PC
文件页数/大小: 115 页 / 3055 K
品牌: FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
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F71872  
5
4
DD  
R
R
-
-
Data Error in Data Field.  
The FDC detects a CRC error in the data field.  
WC  
Wrong Cylinder.  
Set when the track address from the sector ID field is different from the track  
address maintained inside the FDC.  
3
2
SE  
SN  
R
R
-
-
Scan Equal.  
Set if the equal condition is satisfied during execution of the SCAN command.  
Scan Not Satisfied.  
Set when the FDC cannot find a sector on the track which meets the desired  
condition during any scan command.  
1
0
BC  
R
R
-
-
Bad Cylinder.  
The track address from the sector ID field is different from the track address  
maintained inside the FDC and is equal to FFh which indicates a bad track.  
MD  
Missing Data Address Mark.  
Set when the FDC cannot detect a data address mark or a deleted data  
address mark.  
Status Registers 3  
Bit  
Name  
R/W Default  
Description  
7
6
Reserved  
-
-
-
Unused. This bit is always “0”.  
WP  
R
Write Protect.  
Indicates the status of WPT# pin.  
5
4
Reserved  
T0  
R
R
-
-
Unused. This bit is always “1”.  
Track 0.  
Indicates the status of the TRK0# pin.  
3
2
Reserved.  
HD  
R
R
-
-
Unused. This bit is always “1”.  
Head Address.  
Indicates the status of the HDSEL# pin.  
1
0
DS1  
DS0  
R
R
-
-
Drive Select.  
These two bits indicate the DS1, DS0 bits in the command phase.  
7.2.3.10 Digital Input Register (PC-AT Mode) Base + 7  
Bit  
Name  
R/W Default  
Description  
7
DSKCHG  
R
R
-
-
This bit indicates the complement of DSKCHG# disk interface input.  
Reserved.  
6-0 Reserved  
7.2.3.11 Digital Input Register (PS/2 Mode) Base + 7  
Bit  
Name  
R/W Default  
Description  
7
DSKCHG  
R
-
-
-
This bit indicates the complement of DSKCHG# disk interface input.  
Reserved.  
6-3 Reserved  
42  
July, 2007  
V0.28P  
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