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F71872FG 参数 Datasheet PDF下载

F71872FG图片预览
型号: F71872FG
PDF下载: 下载PDF文件 查看货源
内容描述: 超级H / W监控+ LPC IO [Super H/W Monitor + LPC IO]
分类和应用: 监控PC
文件页数/大小: 115 页 / 3055 K
品牌: FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
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F71872  
Keyboard reset and GateA20  
Keyboard reset (kbrst_n) is pin p20 of microcontroller or hardware decode. It is selected by bit 0 of clock  
select register(index F0h).GateA20 is pin p21 of microcontroller or hardware decode, It is selected by bit 1 of  
clock select register(index F0h)  
Kbrst_n  
P20  
Gatea20  
KBC  
P21  
P26  
P27  
P23  
P22  
P24  
P25  
kbclk  
kbdat  
moclk  
modat  
kbirq  
moirq  
Host Phase  
The table is keyboard controller interface with the system.  
Read data: this is an 8 bit read only register, when system read this register; the interrupt and obf flag will be  
cleared.  
Write data: this is an 8 bit write only register, when system write this register, the ibf flag will be set.  
Read status: this is an 8 bit read only register, it replay KBC status.  
Write command: this is an 8 bit write only register, when system write this register, the ibf flag will be set.  
Host address  
R/W  
R
Function  
60h  
60h  
64h  
64h  
Read data  
Write data  
W
R
Read status  
Write command  
W
6.9 Dynamic Voltage Change Application  
The F71872 supports an automatic/dynamic over-voltage function for application of over-clocking or  
under clocking. This function provides a pin by external trigger signal to improve the CPU’s performance by  
25  
July, 2007  
V0.28P  
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