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F71872FG 参数 Datasheet PDF下载

F71872FG图片预览
型号: F71872FG
PDF下载: 下载PDF文件 查看货源
内容描述: 超级H / W监控+ LPC IO [Super H/W Monitor + LPC IO]
分类和应用: 监控PC
文件页数/大小: 115 页 / 3055 K
品牌: FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
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F71872  
(1). When expected count is FFFFh, PWMOUT duty-cycle (PWM_DUTY)will be set to 00h to turn off fan.  
(2). When expected count is 0000h, PWMOUT duty-cycle (PWM_DUTY) will be set to FFh to turn on fan  
with full speed.  
(3). If both (1) and (2) are not true and KEEP_STOP (see INDEX 60h) is set to 0:  
(a). When PWMOUT duty-cycle decrease to STOP_DUTY(00h), obviously the duty-cycle will  
decrease to 00h next, F71872 will keep duty-cycle at 00h 3 seconds1. After that, F71872 starts to  
compare current fan count and expected count in order to increase or decrease its duty-cycle.  
This ensures that if there is any glitch during the 3 seconds1 period, F71872 will ignore it.  
(b). When PWMOUT duty-cycle increase from 00h to START_DUTY(00h), F71872 also will keep  
duty-cycle at START_DUTY 3 seconds1. After that, F71872 starts to compare current fan count  
and expected count in order to increase or decrease its duty-cycle. This ensures that if there is  
any glitch during the 3 seconds1 period, F71872 will ignore it.  
Note 1: The period of HOLD_DUTY_TIME can be programmed at INDEX 67h of FAN1.  
START  
STOP  
START  
STOP  
6.4.6 FAN_FAULT#  
Fan_Fault will be asserted ( throuth PME# Pin 73) when the fan speed doesn’t meet the expected fan  
speed within a programmable period (default is 3 seconds) when PWMOUT duty-cycle is 100%.  
22  
July, 2007  
V0.28P  
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