F71872
Pin1 RST_DRV = 1(high) : OD
=0(low) : Drive
It is a output buffer of RSTCON#,LRESET# and PCIRSTIN.
48
68
PCIRST5#/GPIO15 I/OOD16t VCC
LED_VCC
General purpose IO.
Pin1 RST_DRV = 1(high) : OD
=0(low) : Drive
Power LED for VCC.
COPEN#
INt
INt
VBAT
Case Open Detection #. This pin is connected to a specially
designed low power CMOS flip-flop backed by the battery for
case open state preservation during power loss.
71
72
S3#/GPIO31
VSB
VSB
S3# Input is Main power on-off switch input.
I/OD12t
OD12
General purpose IO.
PWSWOUT#
/GPIO20
Panel Switch Output. This pin is low active and pulse output.
It is power on request output#.
General purpose IO.
Main power switch button input.
General purpose IO.
I/OD12t
INt
I/OD12t
OD12
75
76
PWSWIN#
/GPIO22
VSB
VSB
PSON#/GPIO23
Power supply on-off control output. Connect to ATX power
supply PS_ON# signal.
I/OD12t
General purpose IO.
78
84
85
PWROK2/GPIO25/ I/OD12t
VSB
PWROK function, It is power good signal of VCC, which is
delayed 400ms (default) as VCC arrives at 2.8V.
General purpose IO.
Power LED for VSB
It is a output buffer of RSTCON#,LRESET# and PCIRSTIN.
General purpose IO.
Pin1 RST_DRV = 1(high) : OD
=0(low) : Drive
Resume Reset# function, It is power good signal of VSB,
which is delayed 66ms as VSB arrives at 2.3V.
General purpose IO.
LED_VSB
PCIRST4#/GPIO26 I/OOD16t VSB
RSMRST#/GPIO27 I/OD12t
VSB
5.9 VID controlling pins
Pin No.
13,14,
16,17,
18,19
20-25
79
Pin Name
Type
PWR
Description
VIDIN[5:0]
INts
VCC
CPU VID input pins.
1. Special level input VIHÆ 0.9, VIL Æ 0.6.
2. Power by VCC.
CPU VID output pins.
CPU SLOTOCC# input.
VIDOUT[5:0]
SLOTOCC#
OD12
INts
VCC
VSB
13
July, 2007
V0.28P
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
