F71872
115
116
I/O12ts5V
I/O12ts5V
VCC
VCC
Parallel port data bus bit 6.
Parallel port data bus bit 7.
PD6
PD7
5.7 H/W Monitor
Pin No.
Pin Name
Type
PWR
Description
95
ATXPG/VIN4
AIN
VCC
ATX Power Good.
Voltage Input 4.
91
PCIRSTIN#/VIN8
AIN
VCC
PCI Reset # signal input.
Voltage Input 8.
92-94,
96-98
7
8
VIN7~VIN5
VIN3~VIN1
FANIN1
AIN
AIN
INts
O12
VCC
VCC
VCC
VCC
Voltage Input 7 ~ 5.
Voltage Input 3 ~ 1.
Fan 1 tachometer input.
Fan 1 control output. This pin provides PWM duty-cycle
output or a voltage output.
FANCTL1
9
10
FANIN2
FANCTL2
INts
O12
VCC
VCC
Fan 2 tachometer input.
Fan 2 control output. This pin provides PWM duty-cycle
output or a voltage output.
11
12
FANIN3
FANCTL3
INts
O12
VCC
VCC
Fan 3 speed input.
Fan 3 control output. This pin provides PWM duty-cycle
output or a voltage output.
87
88
89
90
73
D3+
D2+
D1+
VREF
AIN
AIN
AIN
AOUT
OD12
I/OD12t
VCC
VCC
VCC
VCC
VSB
CPU thermal diode/transistor temperature sensor input.
CPU thermal diode/transistor temperature sensor input.
CPU thermal diode/transistor temperature sensor input.
Voltage sensor output.
Generated PME event. It supports the PCI PME# interface.
This signal allows the peripheral to request the system to
wake up from the S3 state.
PME#/GPIO21
General Purpose IO.
General purpose IO.
1. Support Level and Pulse mode output.
2. Open drain and drive select
3. Without input de-bounce.
General purpose IO.
1. Support Level and Pulse mode output.
2. Open drain and drive select
3. Without input de-bounce.
General purpose IO.
1. Support Level and Pulse mode output.
2. Open drain and drive select
3. Without input de-bounce.
General purpose IO.
1. Support Level and Pulse mode output.
2. Open drain and drive select
26
27
28
29
GPIO0
GPIO1
GPIO2
I/OOD12t VCC
I/OOD12t VCC
I/OOD12t VCC
I/OOD12t VCC
GPIO3/
Voltage_Fault1#/
IRRX
3. Without input de-bounce.
Voltage fault indication for VIN1 abnormal event.
Infrared Receiver input. (Powered by Vcc)
11
July, 2007
V0.28P
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
