F71862
7-0 DATA
R/W
00h The FIFO is used to transfer all commands, data and status between controller
and the system. The Data Register consists of four status registers in a stack
with only one register presented to the data bus at a time. The FIFO is default
disabled and could be enabled via the CONFIGURE command.
Status Registers 0
Bit
Name
R/W Default
Description
7-6 IC
R
-
Interrupt code :
00: Normal termination of command.
01: Abnormal termination of command.
10: Invalid command.
11: Abnormal termination caused by poling.
5
4
SE
EC
R
R
-
-
Seek end.
Set when a SEEK or RECALIBRATE or a READ or WRITE with implied seek
command is completed.
Equipment check.
0: No error
1: When a fault signal is received form the FDD or the TRK0# signal fails to
occur after 77 step pulses.
3
2
NR
HD
R
-
Not ready.
0: Drive is ready
1: Drive is not ready.
R
R
-
-
Head address.
The current head address.
1-0 DS
Drive select.
00: Drive A selected.
01: Drive B selected.
10: Drive C selected.
11: Drive D selected.
Status Registers 1
Bit
Name
R/W Default
Description
7
EN
DE
OR
R
R
R
-
-
-
End of Track.
Set when the FDC tries to access a sector beyond the final sector of a cylinder.
6
4
Data Error.
The FDC detect a CRC error in either the ID field or the data field of a sector.
Overrun/Underrun.
Set when the FDC is not serviced by the host system within a certain time
interval during data transfer.
3
2
Reserved
ND
-
-
-
Unused. This bit is always “0”
R
No Data.
Set when the following conditions occurred:
1. The specified sector is not found during any read command.
2. The ID field cannot be read without errors during a READ ID command.
3. The proper sector sequence cannot be found during a READ TRACK
command.
22
July, 2008
V.28P
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
