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F71862 参数 Datasheet PDF下载

F71862图片预览
型号: F71862
PDF下载: 下载PDF文件 查看货源
内容描述: 超级硬件监控+ LPC I / O [Super Hardware Monitor + LPC I/O]
分类和应用: 监控PC
文件页数/大小: 110 页 / 837 K
品牌: FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
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F71862  
7
6
INTPEND  
DRV2_N  
R
R
0
-
This bit indicates the state of the interrupt output.  
0: a second drive has been installed.  
1: a second drive has not been installed.  
5
4
3
STEP  
R
R
R
0
-
This bit indicates the complement of STEP# disk interface output.  
This bit indicates the state of TRK0# disk interface input.  
TRK0_N  
HDSEL  
0
This bit indicates the complement of HDSEL# disk interface output.  
0: side 0.  
1: side 1.  
2
1
INDEX_N  
WPT_N  
R
R
-
-
This bit indicates the state of INDEX# disk interface input.  
This bit indicates the state of WPT# disk interface input.  
0: disk is write-protected.  
1: disk is not write-protected.  
0
DIR  
R
0
This bit indicates the complement of DIR# disk interface output.  
Status Register A (Model 30 mode) Base + 0  
Bit  
Name  
R/W Default  
Description  
7
6
5
4
3
INTPEND  
R
R
R
R
R
0
0
0
-
This bit indicates the state of the interrupt output.  
DRQ  
This bit indicates the state of the DRQ signal.  
STEP_FF  
TRK0  
This bit indicates the complement of latched STEP# disk interface output.  
This bit indicates the complement of TRK0# disk interface input.  
HDSEL_N  
1
This bit indicates the state of HDSEL# disk interface output.  
0: side 0.  
1: side 1.  
2
1
INDEX  
WPT  
R
R
-
-
This bit indicates the complement of INDEX# disk interface input.  
This bit indicates the complement of WPT# disk interface input.  
0: disk is write-protected.  
1: disk is not write-protected.  
0
DIR_N  
R
1
This bit indicates the state of DIR# disk interface output.  
0: head moves in inward direction.  
1: head moves in outward direction.  
Status Register B (PS/2 Mode) Base + 1  
Bit Name R/W Default  
7-6 Reserved  
Description  
R
R
R
R
R
R
11  
0
Reserved. Return 11b when read.  
5
4
3
2
1
DR0  
Drive select 0. This bit reflects the bit 0 of Digital Output Register.  
This bit changes state at every rising edge of WDATA#.  
This bit changes state at every rising edge of RDATA#.  
This bit indicates the complement of WGATE# disk interface output.  
WDATA  
RDATA  
WGATE  
MOTEN1  
0
0
0
0
This bit indicates the complement of MOB# disk interface output. Not support  
in this design.  
0
MOTEN0  
R
0
This bit indicates the complement of MOA# disk interface output.  
19  
July, 2008  
V.28P  
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