MC81F4x16
IICDSR
IIC DATA SHIFT REGISTER
00E4H
7
6
5
4
3
2
1
0
IICDSR
One byte register
R/W R/W
Reset value: XXH
R/W
R/W
R/W
R/W
R/W
R/W
When only IICSCR.6=‟1‟, write operation is enabled. But read operation is possible at anytime,
regardless of the current IICSCR.6 bit setting.
A 8 bit register for Tx/Rx data of slave IIC.
Note that, When only the IICEN(IICSCR.6) bit is enabled, writing to the „IICAR‟ is available.
But reading is possible anytime, regardless of the current IICEN(IICSCR.6) bit status.
IICAR
IIC ADDRESS REGISTER
00E3H
7
6
5
4
3
2
1
0
-
IICAR
7 bits address data
R/W R/W R/W
Reset value: XXH
R/W
R/W
R/W
R/W
R/W
A 8 bit register for the 7 bit slave address.
Note that, When only the IICEN(IICSCR.6) bit is disabled, writing to the „IICAR‟ is available.
But reading is possible anytime, regardless of the current IICEN(IICSCR.6) bit status.
162
October 19, 2009 Ver.1.35
FINECHIPS [ FINECHIPS ]
