MC81F4x16
24.4 Muti-processor Communication
TxD
RxD
MASTER
RxD
TxD
RxD
TxD
RxD
TxD
Slave 1
Slave 1
Slave N
Figure 24-6 Connection Example for Multiprocessor Serial Data Communications
The MC81F4x32 multiprocessor communication features lets a "master" device send a multiple-frame
serial message to a "slave" device in a multi-processor configuration. It does this without interrupting
other slave devices that may be on the same serial line.
This feature can be used only in UART modes 2 or 3. In these modes 2 and 3, 9 data bits are
received. The 9th bit value is written to RB8 (UCONH.2). The data receive operation is concluded with
a stop bit. You can program this function so that when the stop bit is received, the serial interrupt will
be generated only if RB8 = "1".
To enable this feature, you set the MCE bit in the UCONH register. When the MCE bit is "1", serial
data frames that are received with the 9th bit = "0" do not generate an interrupt. In this case, the 9th
bit simply separates the address from the serial data.
Sample Protocol for Master/Slave Interaction
When the master device wants to transmit a block of data to one of several slaves on a serial line, it
first sends out an address byte to identify the target slave. Note that in this case, an address byte
differs from a data byte: In an address byte, the 9th bit is "1" and in a data byte, it is "0".
The address byte interrupts all slaves so that each slave can examine the received byte and see if it
is being addressed. The addressed slave then clears its MCE bit and prepares to receive incoming
data bytes.
The MCE bits of slaves that were not addressed remain set, and they continue operating normally
while ignoring the incoming data bytes.
While the MCE bit setting has no effect in mode 0, it can be used in mode 1 to check the validity of
the stop bit. For mode 1 reception, if MCE is "1", the receive interrupt will be issue unless a valid stop
bit is received.
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October 19, 2009 Ver.1.35
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