FM25Q64ꢀ
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11.2ꢀINSTRUCTIONSꢀ
TheꢀinstructionꢀsetꢀofꢀtheꢀFM25Q64ꢀconsistsꢀofꢀfifteenꢀbasicꢀinstructionsꢀthatꢀareꢀfullyꢀcontrolledꢀ
throughꢀtheꢀSPIꢀbusꢀ(seeꢀInstructionꢀSetꢀtable).ꢀInstructionsꢀareꢀinitiatedꢀwithꢀtheꢀfallingꢀedgeꢀofꢀ
ChipꢀSelectꢀ(/CS).ꢀTheꢀfirstꢀbyteꢀofꢀdataꢀclockedꢀintoꢀtheꢀDIꢀinputꢀprovidesꢀtheꢀinstructionꢀcode.ꢀ
DataꢀonꢀtheꢀDIꢀinputꢀisꢀsampledꢀonꢀtheꢀrisingꢀedgeꢀofꢀclockꢀwithꢀmostꢀsignificantꢀbitꢀ(MSB)ꢀfirst.ꢀ
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Instructionsꢀvaryꢀinꢀlengthꢀfromꢀaꢀsingleꢀbyteꢀtoꢀseveralꢀbytesꢀandꢀmayꢀbeꢀfollowedꢀbyꢀaddressꢀ
bytes,ꢀdataꢀbytes,ꢀdummyꢀbytesꢀ(don’tꢀcare),ꢀandꢀinꢀsomeꢀcases,ꢀaꢀcombination.ꢀInstructionsꢀareꢀ
completedꢀwithꢀtheꢀrisingꢀedgeꢀofꢀedgeꢀ/CS.ꢀClockꢀrelativeꢀtimingꢀdiagramsꢀforꢀeachꢀinstructionꢀareꢀ
includedꢀ inꢀ figuresꢀ 4ꢀ throughꢀ 29.ꢀ Allꢀ readꢀ instructionsꢀ canꢀ beꢀ completedꢀ afterꢀ anyꢀ clockedꢀ bit.ꢀ
However,ꢀallꢀinstructionsꢀthatꢀWrite,ꢀProgramꢀorꢀEraseꢀmustꢀcompleteꢀonꢀaꢀbyteꢀ(/CSꢀdrivenꢀhighꢀ
afterꢀaꢀfullꢀ8ꢁbitꢀhaveꢀbeenꢀclocked)ꢀotherwiseꢀtheꢀinstructionꢀwillꢀbeꢀterminated.ꢀThisꢀfeatureꢀfurtherꢀ
protectsꢀtheꢀdeviceꢀfromꢀinadvertentꢀwrites.ꢀAdditionally,ꢀwhileꢀtheꢀmemoryꢀisꢀbeingꢀprogrammedꢀorꢀ
erased,ꢀorꢀwhenꢀtheꢀStatusꢀRegisterꢀisꢀbeingꢀwritten,ꢀallꢀinstructionsꢀexceptꢀforꢀReadꢀRegisterꢀwillꢀ
beꢀignoredꢀuntilꢀtheꢀprogramꢀorꢀeraseꢀcycleꢀhasꢀcompleted.ꢀ
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11.2.1ꢀManufacturerꢀandꢀDeviceꢀIdentificationꢀ
MANUFACTRERꢀIDꢀ
(M7ꢁM0)ꢀ
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FidelixꢀSemiconductorꢀ ꢀ
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F8hꢀ
DeviceꢀIDꢀ
Instructionꢀ
FM25Q64ꢀ
(ID7ꢁID0)ꢀ
ABh,ꢀ90hꢀ
16hꢀ
(ID15ꢁID0)ꢀ
9Fhꢀ
3217hꢀ
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preliminary(Aug.18.2010)ꢀ ꢀ ꢀ ꢀ
17ꢀ
FIDELIX [ FIDELIX ]
