Instruction(05hꢀorꢀ35h)
FM25Q64ꢀ
ꢀ
11.2.6ꢀWriteꢀDisableꢀ(04h)ꢀ ꢀ
Theꢀ Writeꢀ Disableꢀ instructionꢀ (Figureꢀ 6)ꢀ resetsꢀ theꢀ Writeꢀ Enableꢀ Latchꢀ (WEL)ꢀ bitꢀ inꢀ theꢀ Statusꢀ
Registerꢀtoꢀaꢀ0.ꢀTheꢀWriteꢀDisableꢀinstructionꢀinꢀenteredꢀbyꢀdrivingꢀ/CSꢀlow,ꢀshiftingꢀtheꢀinstructionꢀ
codeꢀ“04h”ꢀintoꢀtheꢀDIꢀpinꢀandꢀthenꢀdrivingꢀ/CSꢀhigh.ꢀNoteꢀthatꢀtheꢀWELꢀbitꢀisꢀautomaticallyꢀresetꢀ
afterꢀPowerꢁupꢀandꢀuponꢀcompletionꢀofꢀtheꢀWriteꢀStatusꢀRegister,ꢀPageꢀProgram,ꢀSectorꢀErase,ꢀ
BlockꢀEraseꢀandꢀChipꢀEraseꢀinstructions.ꢀ ꢀ ꢀ ꢀ ꢀ ꢀ .ꢀ
/CS
Modeꢀ 3
Modeꢀ 0
Modeꢀ 3
Modeꢀ 0
0
1
2
3
4
5
6
7
CLK
Instructionꢀ (04h)
DI
HighꢀImpedance
DO
Figureꢀ6.ꢀWriteꢀDisableꢀInstructionꢀSequenceꢀDiagramꢀ
ꢀ
11.2.7ꢀReadꢀStatusꢀRegisterꢁ1ꢀ(05h)ꢀandꢀReadꢀStatusꢀRegisterꢁ2ꢀ(35h)ꢀ
TheꢀReadꢀStatusꢀRegisterꢀinstructionsꢀallowꢀtheꢀ8ꢁbitꢀStatusꢀRegisterꢀtoꢀbeꢀread,ꢀTheꢀinstructionꢀisꢀ
enteredꢀbyꢀdrivingꢀ/CSꢀlowꢀandꢀshiftingꢀtheꢀinstructionꢀcodeꢀ“05h”ꢀforꢀStatusꢀRegisterꢁ1ꢀandꢀ“35h”ꢀ
forꢀStatusꢀRegisterꢁ2ꢀintoꢀtheꢀDIꢀpinꢀonꢀtheꢀrisingꢀedgeꢀofꢀCLK.ꢀTheꢀstatusꢀregisterꢀbitsꢀareꢀthenꢀ
shiftedꢀoutꢀonꢀtheꢀDOꢀpinꢀatꢀtheꢀfallingꢀedgeꢀofꢀCLKꢀwithꢀmostꢀsignificantꢀbitꢀ(MSB)ꢀfirstꢀasꢀshownꢀinꢀ
figureꢀ7.ꢀTheꢀStatusꢀRegisterꢀbitsꢀareꢀshownꢀinꢀfigureꢀ3aꢀandꢀ3bꢀincludeꢀtheꢀBUSY,ꢀWEL,ꢀBP2ꢁBP0,ꢀ
TB,ꢀ SEC,ꢀ SRP0,ꢀ SRP1ꢀ andꢀ QEꢀ bitsꢀ (seeꢀ descriptionꢀ ofꢀ theꢀ Statusꢀ Registerꢀ earlierꢀ inꢀ thisꢀ
datasheet).ꢀ
Theꢀ Statusꢀ Registerꢀ instructionꢀ mayꢀ beꢀ usedꢀ atꢀ anyꢀ time,ꢀ evenꢀ whileꢀ aꢀ Program,ꢀ Erase,ꢀ Writeꢀ
SecurityꢀRegisterꢀorꢀWriteꢀStatusꢀRegisterꢀcycleꢀisꢀinꢀprogress.ꢀThisꢀallowsꢀtheꢀBUSYꢀstatusꢀbitꢀtoꢀ
beꢀ checkedꢀ toꢀ determineꢀ whenꢀ theꢀ cycleꢀ isꢀ completeꢀ andꢀ ifꢀ theꢀ deviceꢀ canꢀ acceptꢀ anotherꢀ
instruction.ꢀTheꢀStatusꢀRegisterꢀcanꢀbeꢀreadꢀcontinuously,ꢀasꢀshownꢀinꢀFigureꢀ7.ꢀTheꢀinstructionꢀisꢀ
completedꢀbyꢀdrivingꢀ/CSꢀhigh.ꢀ
/CS
Modeꢀ 3
Modeꢀ 0
6
5
7
8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23
0
1
2
3
4
CLK
DI
StatusꢀRegisterꢀꢀout
StatusꢀRegisterꢀout
DO
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
=MSB
ꢀ
Figureꢀ7.ꢀReadꢀStatusꢀRegisterꢀInstructionꢀSequenceꢀDiagramꢀ
ꢀ
preliminary(Aug.18.2010)ꢀ ꢀ ꢀ ꢀ
21ꢀ
FIDELIX [ FIDELIX ]
