February 1996
NDS9953A
Dual P-Channel Enhancement Mode Field Effect Transistor
General Description
These P-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary, high
cell density, DMOS technology. This very high density
process is especially tailored to minimize on-state resistance,
provide superior switching performance, and withstand high
energy pulses in the avalanche and commutation modes.
These devices are particularly suited for low voltage
applications such as notebook computer power management
and other battery powered circuits where fast switching, low
in-line power loss, and resistance to transients are needed.
Features
-2.9A, -30V. R
DS(ON)
= 0.13
Ω
@ V
GS
= -10V.
High density cell design for extremely low R
DS(ON)
.
High power and current handling capability in a widely used
surface mount package.
Dual MOSFET in surface mount package.
________________________________________________________________________________
5
4
3
2
1
6
7
8
Absolute Maximum Ratings
Symbol
V
DSS
V
GSS
I
D
P
D
Parameter
Drain-Source Voltage
Gate-Source Voltage
Drain Current - Continuous
- Pulsed
T
A
= 25°C unless otherwise noted
NDS9953A
-30
± 20
(Note 1a)
Units
V
V
A
± 2.9
± 10
2
Power Dissipation for Dual Operation
Power Dissipation for Single Operation
(Note 1a)
(Note 1b)
(Note 1c)
W
1.6
1
0.9
-55 to 150
°C
T
J
,T
STG
Operating and Storage Temperature Range
THERMAL CHARACTERISTICS
R
θ
JA
R
θ
JC
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
(Note 1a)
(Note 1)
78
40
°C/W
°C/W
© 1997 Fairchild Semiconductor Corporation
NDS9953A.SAM