February 1996
NDS9936
Dual N-Channel Enhancement Mode Field Effect Transistor
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary, high cell
density, DMOS technology. This very high density process is
especially tailored to minimize on-state resistance and provide
superior switching performance. These devices are particularly
suited for low voltage applications such as DC/DC conversion,
disk drive motor control, and other battery powered circuits
where fast switching, low in-line power loss, and resistance to
transients are needed.
Features
5A, 30V. R
DS(ON)
= 0.05
Ω
@ V
GS
= 10V.
High density cell design for extremely low R
DS(ON)
.
High power and current handling capability in a widely used
surface mount package.
Dual MOSFET in surface mount package.
________________________________________________________________________________
5
4
3
2
1
6
7
8
Absolute Maximum Ratings
T
A
= 25°C unless otherwise noted
Symbol
V
DSS
V
GSS
I
D
Parameter
Drain-Source Voltage
Gate-Source Voltage
Drain Current - Continuous @ T
A
= 25°C
- Continuous @ T
A
= 70°C
- Pulsed
P
D
@ T
A
= 25°C
Power Dissipation for Dual Operation
Power Dissipation for Single Operation
(Note 1a)
(Note 1b)
(Note 1c)
(Note 1a)
(Note 1a)
NDS9936
30
± 20
± 5.0
± 4.0
± 40
2
1.6
1
0.9
-55 to 150
78
40
Units
V
V
A
W
T
J
,T
STG
Operating and Storage Temperature Range
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
°C
°C/W
°C/W
THERMAL CHARACTERISTICS
R
θ
JA
R
θ
JC
(Note 1a)
(Note 1)
© 1997 Fairchild Semiconductor Corporation
NDS9936.SAM