May 1996
NDS8435
Single P-Channel Enhancement Mode Field Effect Transistor
General Description
Features
-7A, -30V. RDS(ON) = 0.028W @ VGS = -10V
SO-8 P-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary,
high cell density, DMOS technology. This very high
density process is especially tailored to minimize on-state
resistance and provide superior switching performance.
These devices are particularly suited for low voltage
applications such as notebook computer power
management and other battery powered circuits where
fast switching, low in-line power loss, and resistance to
transients are needed.
RDS(ON) = 0.045W @ VGS = -4.5V.
High density cell design for extremely low RDS(ON).
High power and current handling capability in a widely used
surface mount package.
___________________________________________________________________________________________
4
3
2
1
5
6
7
8
Absolute Maximum Ratings TA = 25°C unless otherwise noted
Symbol Parameter
NDS8435
Units
Drain-Source Voltage
Gate-Source Voltage
Drain Current - Continuous
- Pulsed
-30
V
V
A
VDSS
VGSS
ID
-20
(Note 1a)
-7
-25
Maximum Power Dissipation
(Note 1a)
(Note 1b)
2.5
W
PD
1.2
(Note 1c)
1
Operating and Storage Temperature Range
-55 to 150
°C
TJ,TSTG
THERMAL CHARACTERISTICS
Thermal Resistance, Junction-to-Ambient
(Note 1a)
(Note 1)
50
25
°C/W
°C/W
R
JA
q
Thermal Resistance, Junction-to-Case
R
JC
q
NDS8435 Rev. B2
© 1997 Fairchild Semiconductor Corporation